1. Field of the Invention
This invention relates to buffer amplifier circuits and more particularly to a buffer amplifier circuit used as a load driving circuit for effecting ON and OFF of a relatively large current flowing through a small electronic device such as a crystal timepiece and the like.
2. Description of the Prior Art
A load driving circuit for a small electronic device driven by a battery has heretofore been frequently composed of complementary MOS transistors for the purpose of decreasing consumption of the battery. Such MOS transistor usually constituting a logic part of the circuit has a width and length on the order of approximately 10.mu., respectively. An ON resistance of such size of MOS transistor becomes large such as 50 K.OMEGA. to 100 K.OMEGA.. As a result, when a relatively large current must be made ON and OFF by only one part of the device, as a buffer amplifier use is made of a MOS transistor having a particularly large channel width by taking the above mentioned large resistance value into consideration.
However, if an input voltage applied to the complementary MOS transistors becomes substantially one-half an electric source voltage, both P channel MOS transistor and N channel MOS transistor become ON at the same time, thus flowing a so-called threading current therethrough. In the above mentioned buffer amplifier circuit, this threading current becomes so large that a consumed electric current is significantly increased.